Light & Electronics

Printed Circuit Boards

The language of PCB design, fabrication, assembly and the lab bench.

  • 106 terms
  • 28 shop talk
  • 8 topics

Printed circuit boards have two vocabularies that meet at the release package. Designers talk about footprints, fanout, the rat's nest, ground planes and impedance control, while the board house talks about cores, prepreg, copper weight, plating, etching and annular ring. Assembly adds stencils, solder paste, reflow profiles and pick-and-place, and quality engineers bring the defect names: tombstoning, head-in-pillow, bridging, voiding and black pad.

Much of the formal language follows IPC standards and the habits of fabrication shops. An IPC class decides how much annular ring breakout is acceptable, Gerber or ODB++ data carries the artwork, and a stackup fixes the cores and prepregs that set every impedance. Abbreviations are everywhere, from PTH, HDI and DFM to ENIG, HASL, AOI and CAF, and insiders use them without ever spelling them out.

The shop talk comes from the lab bench and the fab floor. Engineers spin a board, smoke test it and bring it up, patching mistakes with a bodge wire or blue wire, or dead-bugging a part whose footprint came out mirrored, until the respin. Fab people point out acid traps, slivers and swiss-cheese planes, and assembly lines keep a bone pile of failed boards. Everyday words take on narrow meanings: core, pad, trace, spin, stuff, bake, wick, coupon and whisker.

What marks an insider is knowing which side of the handoff a problem belongs to. A newcomer blames the assembler for a tombstoned capacitor; a veteran checks whether one of its pads is tied solid to a plane. Knowing that via-in-pad needs filling, that V-score only runs in straight lines and that a smoke test proves only that nothing burned is what earns credibility with designers and the shop floor alike.

Who talks like this: PCB layout designers, hardware and signal integrity engineers, CAM engineers, fabrication and assembly technicians, process and quality engineers, test engineers, component buyers and electronics hobbyists.

Start here: ten words every newcomer needs

Overheard on the job

Real-sounding lines from the floor, translated into plain English.

Materials & Stackup

10 terms

Laminates, prepregs, copper and the layer stackups that set a board's thickness and impedance.

Vias & Drilling

13 terms

Through, blind, buried and micro vias, the holes behind them and the limits of drilling and plating.

Design & Layout

18 terms

Footprints, routing, planes and the rules and slang of layout designers.

Artwork, Data & Release

9 terms

The files and words that carry a design from CAD to the factory.

Fabrication

18 terms

How bare boards are etched, plated, masked, finished, panelized and graded.

Assembly

10 terms

Putting parts on boards: paste, stencils, placement and soldering.

Defects & Inspection

15 terms

Solder and laminate defects and the inspections and tests that catch them.

Bench & Rework

13 terms

Lab bench slang for bringing up, debugging and patching boards.

Frequently asked questions

What is the difference between a core and prepreg?

A core is fully cured laminate with copper foil bonded to both sides, supplied in fixed thicknesses and etched into inner-layer patterns. Prepreg is glass cloth carrying partly cured resin with no copper; it softens, flows and cures in the lamination press, gluing cores and outer foils together. A multilayer board alternates the two, so every dielectric layer in its stackup is either a core or one or more plies of prepreg.

What is the difference between through, blind and buried vias?

A through via is drilled through the entire board and connects any layers it passes. A blind via starts on an outer layer and stops at an inner one, so it is visible from only one side. A buried via connects inner layers only and cannot be seen from either surface. Blind and buried vias free routing space and remove stubs, but each adds drilling, plating or lamination steps, so they raise cost.

What are Gerber files?

Gerber files are the standard way to send a board design to a fabricator. Each file describes one layer, such as top copper, soldermask, silkscreen, paste or board outline, as a two-dimensional image made of flashed shapes and drawn lines. They travel with an Excellon drill file and a fabrication drawing. The RS-274X version embeds the shape definitions, and X2 adds attributes such as layer function, while ODB++ and IPC-2581 package everything in one file.

What causes tombstoning?

Tombstoning happens when the solder on one end of a small chip part melts and wets before the other end, and surface tension pulls the part upright. Common causes are unequal pad sizes, one pad connected solidly to a copper plane that slows its heating, uneven paste deposits, placement offset and a reflow profile without enough soak. Symmetric pads, thermal reliefs on plane connections and a balanced profile usually cure it, especially on 0402 and smaller parts.

What do IPC Class 2 and Class 3 mean?

IPC classes set how strict acceptance criteria are for fabrication and assembly. Class 2 covers dedicated service electronics such as computers, telecom and industrial controls, and is the usual default. Class 3 covers high-reliability products such as medical, aerospace and military equipment that must work every time. Class 3 demands thicker hole plating, no annular ring breakout, fuller solder fillets and tighter defect limits, so it costs more to build and inspect.

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