A NOT gate, or inverter, is a fundamental logic element with a single input and a single output. It flips the logic state: a high input yields a low output, and a low input yields a high output. In CMOS design, it is typically built from a complementary pair of transistors (one pMOS and one nMOS) that pull the output to the opposite rail of the input signal.
We need to buffer that clock signal, so run it through two NOT gates in series to sharpen the edges without flipping the phase.
Also heard as
- inverter
Related terms
Logic high
The higher of two voltage states used to represent a binary one in a digital circuit.
Logic low
The lower of two voltage states used to represent a binary zero in a digital circuit.
CMOS
Complementary metal-oxide-semiconductor is the dominant fabrication technology for integrated circuits.
NOR gate
A digital logic gate that outputs true only when all of its inputs are false.