This fabrication technique creates a flat-topped, steep-sided plateau on the silicon wafer. By etching away the surrounding material, the active junction area is isolated and exposed at the edges. This geometry reduces parasitic capacitance and improves high-frequency performance, though the exposed junctions require careful passivation.
Heard on the job
The RF amplifier uses a mesa transistor to minimize base-collector capacitance.
Related terms
Wafer
A highly polished slice of semiconductor material used as the foundation for fabricating integrated circuits.
Junction
The physical interface where two different materials or conductors meet.
Parasitic
An unintended electrical property like capacitance or inductance that exists physically in a circuit.