A positive-edge-triggered device reads its inputs and updates its outputs strictly during the rising transition of a control signal. This prevents the circuit from responding to input fluctuations while the clock is held steady at a high or low level. It is the standard timing method for most synchronous sequential logic.
Heard on the job
We need a positive-edge-triggered D flip-flop here so the data latches right as the clock goes high.
Related terms
Edge-triggered
A digital input that responds only to the transition of a clock signal.
Flip-flop
A bistable logic circuit that stores a single bit of binary data.
Positive edge
The exact moment a digital signal transitions from a low voltage state to a high voltage state.
Clock
A continuous square wave signal that synchronizes the timing of digital circuits.