Propagation delay is the time interval between the application of an input signal and the occurrence of the corresponding output change. In logic gates, it is caused by the time required to charge and discharge internal parasitic capacitances. In high-speed digital design, accumulating propagation delays across multiple gates limits the maximum clock frequency of the circuit.
The propagation delay through the ripple carry adder is too long, causing the output to miss the clock edge.
Also heard as
- gate delay
Related terms
Propagation time
The total duration required for an electrical signal to travel from a source to a destination.
Clock skew
The time difference between a clock signal arriving at different parts of a circuit.
Race condition
A logic failure where the output depends on the unpredictable timing of two or more competing signals.