High-level synthesis is an electronic design automation technique that translates software algorithms written in languages like C or C++ into register-transfer level hardware descriptions. It allows engineers to design complex data paths and control logic at an abstract level, letting the compiler handle the exact timing and gate-level implementation. This accelerates the creation of custom accelerators for FPGAs or ASICs.
We used high-level synthesis to compile the image processing algorithm straight to the FPGA instead of writing Verilog from scratch.
Also heard as
- HLS
Related terms
HDL
A specialized programming language used to describe the structure and behavior of electronic circuits.
FPGA
A field-programmable gate array is an integrated circuit whose internal logic can be configured by the user.
ASIC
An application-specific integrated circuit designed for one dedicated task rather than general-purpose use.