DPLL

abbreviationStandard termElectronics

A digital phase-locked loop is an electronic circuit that synchronizes a digital output signal with a reference input.

A digital phase-locked loop (DPLL) uses digital logic, such as a phase detector and a numerically controlled oscillator, to match the frequency and phase of an input signal. Unlike analog PLLs, which rely on voltage-controlled oscillators and passive filters, DPLLs process discrete time signals. This makes them highly stable over temperature variations and easy to integrate into digital systems like microprocessors and communication interfaces.

Heard on the job

We need to adjust the DPLL loop filter coefficients in firmware to lock onto the noisy clock reference.

Insider tip

Because a DPLL is implemented entirely in the digital domain, its loop parameters can be dynamically changed on the fly without swapping out hardware components.

Also heard as

  • digital phase-locked loop