ADPLL

abbreviationStandard termElectronics

An all-digital phase-locked loop uses purely digital logic to synchronize clock signals.

An all-digital phase-locked loop (ADPLL) replaces the traditional analog components of a PLL, such as the charge pump, loop filter, and voltage-controlled oscillator, with digital equivalents like a time-to-digital converter and a digitally controlled oscillator. This architecture scales easily with advanced semiconductor nodes, offering immunity to analog noise and variations in temperature or voltage.

Heard on the job

We migrated the clock generator to an ADPLL so we could synthesize it directly in the new 5-nanometer process without analog layout headaches.