In digital systems, an arbiter resolves simultaneous requests for a single shared resource, such as a memory bus or peripheral. It uses a predefined priority scheme, like round-robin or fixed-priority, to grant access to one master at a time while holding off others. This prevents bus contention and ensures deterministic system behavior.
The memory arbiter is stalling the CPU because the graphics processor is hogging the bus bandwidth.
Related terms
System bus
A shared communication pathway that links the CPU, memory, and peripherals in a computer.
Control bus
A set of physical connections used by a central processing unit to communicate control signals to other hardware.
Race condition
A logic failure where the output depends on the unpredictable timing of two or more competing signals.