Platform-level interrupt controller. A hardware block in RISC-V systems that aggregates global interrupts from various peripherals and routes them to the appropriate hardware threads, or harts. It handles interrupt prioritization, routing, and masking, ensuring that the processor core responds efficiently to external events.
Check the PLIC configuration because the core isn't waking up when the network interface drops an interrupt.
Also heard as
- platform-level interrupt controller
Related terms
Interrupt
A hardware or software signal that forces a processor to pause its current task and execute a specific routine.
Central processing unit
The primary silicon processor responsible for fetching, decoding, and executing instructions in a computer system.
Microprocessor
An integrated circuit that contains all the functions of a central processing unit.