PLIC

abbreviationStandard termElectronics

A platform-level interrupt controller used in RISC-V architectures to route hardware signals.

Platform-level interrupt controller. A hardware block in RISC-V systems that aggregates global interrupts from various peripherals and routes them to the appropriate hardware threads, or harts. It handles interrupt prioritization, routing, and masking, ensuring that the processor core responds efficiently to external events.

Heard on the job

Check the PLIC configuration because the core isn't waking up when the network interface drops an interrupt.

Also heard as

  • platform-level interrupt controller