A half adder is a fundamental combinational circuit built from an XOR gate and an AND gate. It takes two input bits and calculates their binary sum, outputting the result on a sum pin and any overflow on a carry pin. It is called a half adder because it cannot accept a carry-in bit from a previous stage, making it unsuitable for chaining together to add multi-bit numbers without additional logic.
You can use a half adder for the least significant bit of the arithmetic logic unit, but the rest of the chain needs full adders.
Do not mix it up with
- Full adder: A half adder only adds two bits, while a full adder accepts a third carry-in bit from a previous calculation.
Related terms
Full adder
A digital logic circuit that adds three single-bit binary numbers and outputs a sum and a carry bit.
Combinational logic
A type of digital logic where outputs are determined entirely by the present combination of inputs.
XOR gate
A digital logic gate that outputs a high signal only when its two inputs are at different logic levels.
AND gate
A fundamental digital logic circuit that outputs a high signal only when all its inputs are high.