Inside a computer processor's memory management unit, this hardware cache speeds up virtual memory operations. When a program requests data at a virtual address, the processor checks the translation lookaside buffer first. If the mapping is present, it avoids a costly page walk through main memory. High miss rates here severely degrade system performance, especially in virtualization and large database workloads.
Heard on the job
The hypervisor is thrashing the TLB because we have too many small pages allocated to that virtual machine.
Also heard as
- translation lookaside buffer